vllm.model_executor.layers.sparse_attn_indexer
¶
Custom Sparse Attention Indexer layers.
Classes:
-
PrefillRowShard–One TP rank's contiguous slice of the replicated prefill rows.
-
SparseAttnIndexer–Sparse Attention Indexer Custom Op Layer. This layer is extracted as a
Functions:
-
as_fp32_logits–Upcast SM100's BF16 MQA logits for the FP32 top-k kernels.
-
dcp_gather_kv_rows–All-gather this rank's KV shard and return it in global token order.
-
kv_cache_as_quant_view–4D
[num_blocks, block_size, 1, head_width]view expected by
PrefillRowShard
¶
One TP rank's contiguous slice of the replicated prefill rows.
Rows are independent, so each rank scores only its slice and the group exchanges final int32 top-k indices instead of the logits.
Methods:
-
exchange_topk–Gather per-rank final indices back into global row order.
-
narrow–Row window and narrowed causal bounds of
chunkfor this rank.
Source code in vllm/model_executor/layers/sparse_attn_indexer.py
exchange_topk(topk_buffer, width)
¶
Gather per-rank final indices back into global row order.
Source code in vllm/model_executor/layers/sparse_attn_indexer.py
narrow(chunk)
¶
Row window and narrowed causal bounds of chunk for this rank.
Source code in vllm/model_executor/layers/sparse_attn_indexer.py
SparseAttnIndexer
¶
Bases: CustomOp
Sparse Attention Indexer Custom Op Layer. This layer is extracted as a
separate custom op since it involves heavy custom kernels like mqa_logits,
paged_mqa_logits and top_k_per_row, etc. Those kernels maybe requires
specific memory layout or implementation for different hardware backends to
achieve optimal performance.
For now, the default native path will use CUDA backend path. Other platform
may requires add the corresponding Custom Op name sparse_attn_indexer to
custom_ops in CompilationConfig to enable the platform specific path.
Methods:
-
forward_cpu–CPU sparse attention indexer: cache write stays eager Python glue
Source code in vllm/model_executor/layers/sparse_attn_indexer.py
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forward_cpu(hidden_states, q_quant, k, weights)
¶
CPU sparse attention indexer: cache write stays eager Python glue
(own K-cache layout, not shared with the main attention cache
write). PREFILL and DECODE both call the ported
fp8_paged_mqa_logits_cpu/topk_transform_512_cpu kernels,
which read the paged K-cache directly via page_table -- no
eager gather step, no per-request Python loop.
prefill_metadata.chunks always has exactly one entry here:
DeepseekV4CPUIndexerMetadataBuilder overrides the base chunk
split to always return the whole step's prefill batch as one
chunk, since the base chunking only bounds CUDA/XPU's dense M*N
logits tensor and flat K-gather workspace, neither of which this
paged kernel allocates.
Source code in vllm/model_executor/layers/sparse_attn_indexer.py
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_decode_chunk_ranges(rows, width, budget)
¶
Partition independent Q rows under a BF16 payload budget.
Source code in vllm/model_executor/layers/sparse_attn_indexer.py
_gather_workspace_shapes(total_seq_lens, head_dim, fp8_dtype, use_fp4_cache)
¶
Return ((values_shape, values_dtype), (scales_shape, scales_dtype)) for the K-gather workspace. FP8 path: (T, head_dim) fp8 + (T, 4) uint8 fp32 scales. MXFP4 path: (T, head_dim // 2) uint8 packed mxfp4 + (T, head_dim // MXFP4_BLOCK_SIZE) uint8 ue8m0 scales.
Source code in vllm/model_executor/layers/sparse_attn_indexer.py
_merge_dcp_topk_global(logits, topk_indices, topk_tokens, dcp_rank, dcp_world_size, cp_interleave, row_starts=None)
¶
Merge each DCP rank's local top-K into the global top-K.
topk_indices are this rank's local top-K positions into its 1/N KV
shard. A token in the global top-K must also be in its owning rank's local
top-K (at most topk_tokens - 1 tokens rank globally above it, hence at
most that many on its own rank), so exchanging only the per-rank local
candidates is exact -- equivalent to all-gathering the full logit matrix,
but it ships dcp_world_size * topk_tokens candidates instead of the whole
score row. Overwrites topk_indices with global token ids (-1 for
padding); the attention backend localizes them back to physical slots per
rank.
Source code in vllm/model_executor/layers/sparse_attn_indexer.py
_reserve_row_shard_exchange_transient(topk_indices_buffer, device)
¶
Profiling/dummy runs return before exchange_topk executes; reserve
its worst-case transient so the memory profile accounts for it.
The exchange stages this rank's contiguous slice and the all_gatherv wrapper allocates the full gathered tensor; each is bounded by the buffer's row capacity times its (tile-padded) width.
Source code in vllm/model_executor/layers/sparse_attn_indexer.py
_varlen_decode_rows(q, q_scale, weights, kv_cache, decode, max_model_len, max_seq_len, topk_backend, topk_tokens, topk_indices_buffer, candidate_blocks, candidate_block_size, candidate_write, start, end)
¶
The varlen (SM100) decode logits, candidate selection and top-k of rows
[start, end), with the slice's own DeepGEMM schedule.
Source code in vllm/model_executor/layers/sparse_attn_indexer.py
as_fp32_logits(logits, row_ends)
¶
Upcast SM100's BF16 MQA logits for the FP32 top-k kernels.
Only columns below row_ends (int32, one per row) are converted, the
span the consumers read; DeepGEMM's aligned row stride is kept.
Source code in vllm/model_executor/layers/sparse_attn_indexer.py
dcp_gather_kv_rows(local_padded, deinterleave_idx, gathered_buf, out_buf)
¶
All-gather this rank's KV shard and return it in global token order.
Source code in vllm/model_executor/layers/sparse_attn_indexer.py
kv_cache_as_quant_view(kv_cache, head_dim, use_fp4_cache)
¶
4D [num_blocks, block_size, 1, head_width] view expected by
DeepGEMM, from the 3D indexer kv-cache allocation.